IC Packaging Engineer, Singapore

My client is  a leading developer and provider of high performance analog semiconductors for the computing, storage and consumer markets. They are currently looking for an IC packaging engineer to join their office in Singapore.

Responsibilities:

• Coordinate prototype builds and develop ultimate reduction level manufacturing process flow including die attach, wire- bonding, encapsulation, solder bumping and package stacking
• Develop concepts and define specifications for new multi-chip packages for dense, high speed applications to meet industry and customer quality standards
• Implement appropriate quality plans including SPC.

• Build a bill of materials and specify procurement specs for all components in the bill of materials

Requirements:

• B.e./B.tech/Bs (electronics or material science) or equivalent
• Proficient in advanced packaging technologies including csp, qfn, bga, mcm/mcp, and package stacking
• Proficient in AUTOCAD or equivalent
• Knowledge of semiconductor fabrication, packaging & test
• Working knowledge  in package level test and data collection
• Experience in coordination of internal and external resources
• Atleast 5 years of experience in high speed IC packaging
• Exposure to quality management system- ISO 9001:2000, qs9000, ts16949 and environmental management system-ISO14001

For more information please send a Word copy of your CV to the Environmental team on environmental@selbyjennings-solutions.com, call us on 00 44 207 019 4140, or visit www.selbyjennings-solutions.com.  No PDFs please.